Most of the power and usefulness of today's digital IC devices can be attributed to the increasing levels of integration. More and more components (resistors, diodes, transistors, and the like) are continually being integrated into the underlying chip, or substrate. The substrate is then cut into a number of its constituent integrated circuit devices, analog devices, or other types of thin-film devices such as, for example, thin-film magnetic recording heads and head subcomponents.
The starting material may typically be very high purity silicon. Another exemplary substrate may be made of Alumina Titanium Carbide (AlTiC). The material is grown as a single crystal, taking the shape of a solid cylinder. This crystal is then sawed (like a loaf of bread) to produce wafers typically 10 to 30 cm in diameter and 250 microns thick.
The geometry of the features of the components are generally defined photographically through a process known as photolithography. Very fine surface geometries can be reproduced accurately by this technique. The photolithography process is used to define component regions and build up components one layer on top of another. For example, a thin film head structure as used in magnetic recording media (e.g., hard disk drives) can include 20 material layers with patterns for each layer defined by photolithography and either additive processing (e.g., electroplating, liftoff masking, etc.) or subtractive processing (e.g., ion milling, wet etching, reactive ion etching, chemical mechanical processing, etc.).
The additive or subtractive processing steps function in conjunction with a photoresist. When a photoresist is exposed to a radiation source (e.g., light) of a specific wavelength, the chemical properties of the photoresist solution changes, thereby creating a mask, or template. The mask can then be used with, for example, a subtractive process (e.g., uncovered region is etched away) where the exposed material that is not covered by the mask is etched away (e.g., wet etching, reactive ion etching, or the like).
However, a problem exists with regard to the fact that as the dimensions for photolithography defined features continually grow smaller and smaller, the proper alignment of each mask layer with successive mask layers becomes increasingly problematic. In order to ensure the integrity of a multilayer device, the patterns for different lithography steps that belong to a single structure must be aligned to one another. To accomplish alignment, each pattern transferred to a wafer usually includes a set of alignment marks, which are high precision features that are used as the reference when positioning subsequent patterns. The problem is that as device feature sizes decrease, the resulting reduction of critical dimensions creates ever more stringent overlay requirements. These stringent requirements have traditionally been met with improvements in stepper technology and alignment systems, but development of these technologies is unable to keep pace with ever-increasing demands.
Therefore, what is required is a new method for effectively controlling photolithography overlay and mask alignment processes. The present invention provides a novel solution to this requirement.